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May 1996
PBL 3853 Universal Speech Circuit
Description
The PBL 3853 is a biopolar integrated speech circuit with specific parameters making it highly suitable to be used as a line interface and speech circuit in a telephone line powered electronic payphone. Emphasis has been put on low current consumption in the IC thus facilitating that a greater part of the available line current can be used to power other electrical functions in the design. From a minimum line current of 16 mA, 12 mA at 4.5 V can be used to power auxiliary functions. The circuit can optionally create an active impedance towards the telephone line, set by external passive components, to reduce the current consumption for the transmitted signal. The circuit is designed to be used with a low impedance dynamic microphone but can be used with an electret type as well. The receiver drives a low ohm dynamic transducer directly. External clamping diodes are required on the receiver output. Both transmitter and receiver can be muted separately (receiver cut off). Line length regulation of the gain is possible in both receiver and transmitter. It is also possible to use the circuit without regulation. Payphone tones and confidence tone in the receiver at DTMF dialling can be injected directly into the receiver amplifier where their levels are not affected by line length regulation and without the signal going out on the line. All pin numbers refer to DIP package unless otherwise noted.
Key Features
* Low own current consumption * Can operate both with active and passive impedance towards the line * Derives a high current from the line for auxiliary functions, 12 mA at 16 mA line current * Separate mute inputs for transmitter and receiver (receiver cut off) * Line length regulation possible (line loss compensation * Comes in 18 pin DIP and 20-pin SO package * High line current operation, max. 130 mA * Especially suitable for payphone applications * DTMF - confidence tone input * Excellent RFI performance
1 9
PBL 3853
5 4 10 +V
-
+ 12
-
8
18
P
18-pin plastic DIP
MA Rx
13
Tx
B
P B L 38
20-pin plastic SO
+
L
53
16
6
14
11
3
2
17
15
Figure 1. Block diagram. Pin numbers in all figures refer to DIP package.
38
53
+
7
PBL 3853
IL
RL -0-4k 0 ohm when artificial line is used 5H+5H Rfeed = 400+400
+ LINE
MIC
Z Mic=150 V3
+ C V2
ARTIFICIAL LINE
Recelver cut-off Transmitter mute Recevler tone input
+
E= 50V
600
VL
IDC
Z= 500
V1
REC VDC PBL 3853
see fig 4
V5
V 4
Z Rec
=350
C = 1F when artificial line is used 470F when not used
- LINE
Figure 2. Test set up without rectifier bridge.
RL -0-4k 0 ohm when artificial line is used 5H+5H Rfeed = 400+400
Uz = 15-16V
IL
+ LINE
MIC
Recelver cut-off Transmitter mute Recevler tone input
Z Mic=150 V3
1F
+
E= 50V
V2
600
IDC VL VDC
Z= 500
V1
REC PBL 3853
see fig 4
V5 350
V 4
Z Rec
- LINE
Figure 3. Test set up with rectifier bridge.
IL
R12 R 13
+ Line
R1 C1
PBL3853
5
1
9
+
7 T2
AC-DC char. adjust
R2
Transmitter mute
10 4 +V 12 Mic 13 M TX
+8 + 18
T1
-
Rx
16 +
C9 Rec VDC
6
14
11 C4 R3
3
2 Tone in C5 R6
17
15 Cut-off
Receiver + C7 D2 D3 C10 D1
R1 = 2.7 k R2 = 22 R3 = 6.8 k R4 = 1.8 k R5 = 75 R6 = 910 R7 = 6.2k R8 = 560 R9 = 11 k R10 = 4.7k R11 = 120k R12 = 56 R13 = 68 RC = 30 k* RD = 11k*
C1 = 150 nF C2 = 10 nF C3 = 47 F C4 = 220 nF C5 = 150 nF C6 = 47 nF C7 = 100 nF C8 = 68 nF C9 = 4.7F C10 = 22 F D1 = Z 4.5 V D2 = 1N4148 D3 = 1N4148 T1 = BC178B T2 = BC178B
RA + RB C3
RC
RDTMF DTMF In R5 R4
R7 R8
R11 R10
C8 C2 -Line
RD
R9
C6
* values for the test set up only
Figure 4. Reference figure with line length regulation. DIP-package.
2
PBL 3853
Absolute Maximum Ratings
Parameter Symbol Conditions Min. Max. Unit
Line voltage Continous operating line current, Tamb =70C Continous operating line current, Tamb =70C Input voltage, all inputs Operation temperature Storage temperature
VL IL IL Vpinx Tamb Tsto Dual In Line package Small Outline package -0.5 -20 -55
22 130 100 Vpin4+0.5 +70 +125
V mA mA V C C
Electrical Characteristics
Tamb=+25C. No cable and or line rectifier unless otherwise specified.
Parameter Symbol Ref fig. Conditions Min. Typ. Max. Unit
Terminal voltage Transmitter gain
2 2
IL = 20 mA 20 * 10 log (V2/ V3),1 kHz IL = 57 mA RL = 0 RL = 900 - 2.2 k IL = 20 mA IL = 20 mA, 0-50C
6 41.6 41.0 46.0 47.0 -1 60 -1 -17.9 -18.5 -13.5 -12.5 -1 4.5 -1 1.3 -16.5 -16.5 -11.5 -11.5 43.0 43.0 48.0 48.0 44.4 45.0 50.0 49.0 +1
V dB dB dB dB dB dB dB dB dB dB dB dB dB dB k
Transmitter gain temp dependence Transmitter attenuation in mute mode Transmitter frequencey response Receiver gain
2 2 2 2
Receiver gain temp dependence Receiver tone gain Receiver frequency response Microphone input impedance (Differential) Transmitter input impedance Pin 3 Transmitter dynamic output voltage
2 2 2 2
200 Hz - 3.4 kHz 20 * 10 log(V4/ V1),1 kHz IL = 57 mA RL = 0 RL = 900 - 2.2 k IL = 20 mA IL = 20 mA, 0 - 50C 20 * 10 log (V4/ V5), 1 kHz IL = 25 mA 200 Hz - 3.4 kHz 1 kHz
+1 -15.1 -14.5 -9.5 -10.5 +1 7.5 +1 2.1
6 1.7
4 2
1 kHz 200 Hz - 3.4 kHz < 10% distortion IL = 20 mA - 100 mA IL = 16mA, VDC = 4.5V, IDC = 12mA IL = 16mA, VDC = 4.0V, IDC = 10mA 200 Hz - 3.4 kHz, V3 = 0 - 1Vrms IL = 0 mA - 100 mA 1 kHz 1 kHz, Not mute. Note 1 1 kHz
13
17
21
k
1.8 1.4 1.8 3 28 7.0 35 8.8 6 42 11
Vp Vp Vp Vp k k
Transmitter Max. output voltage Receiver input impedance Pin 15 Receiver tone input impedance Pin 17 Receiver output impedance
2
4 2 2
3
PBL 3853
Ref fig.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Receiver dynamic output voltage
2
Receiver Max. output voltage
3
Transmitter output noise Receiver output noise
2 2
200 Hz - 3.4 kHz< 2% distortion IL = 20 mA - 100 mA Zrec = 150 Measured with rectifier 200 Hz - 3.4 kHz IL = 0 mA - 100 mA V1 = 0 -50 Vrms Psoph - weighted rel. 1 V RL = 900 Psoph - weighted rel. 1 V, with cable: 0 - 5 km, O = 0.5 mm 0 - 3 km, O = 0.4 mm 2 Note1 IL = 16 mA, VDC = 4.5 V 3
0.6 0.25
Vp Vp
0.8 -74 -80
Vp dBPsoph dBPsoph
Mute input voltage at mute (transmit) Input voltage at cut off (receive) DC-supply current
VM VM
2 2 2
V V mA
12
Note: 1. This input has three functions (see page 7). No input should be set on higher level than +V.
4
PBL 3853
+L 1 TO 2 TI 3 +C 4 DCAC 5 GR 6 T2 7 T1 8 FE 9
18 17 16 15 14 13 12 11 10
VDC RI 2 RO RI 1 -L MI 2 MI 1 MO TM
+L 1 TO 2 TI 3 +C 4 DCAC 5 GR 6 T2 7 T1 8 FE 9 NC 10
20 19 18 17 16 15 14 13 12 11
VDC RI2 RO RI1 -L MI 2 MI 1 MO TM NC
18 pin-DIP
Figure 5. Pin configuration.
20 pin-SO
Pin Description
DIP SO Symbol
1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 8 9 10 11
+L TO TI +C DCAC GR T2 T1 FE NC NC TM MO MI 1 MI 2 -L RI1 RO RI 2 VDC
Output of the transmitter (+Line side) Output of the transmitter (side tone signal) Input of the transmitter amplifier The circuit supply (sinks ~ 0,3 mA) Adjustment for DC-char. and AC imp. to line Gain regulation starting point setting Output for transistor 2, active when voltage on the line is too low for VDC Output for transistor 1, active when charging current into VDC's reservoir capacitor Feedback No connection No connection Transmitter mute input Microphone amplifier output Microphone amplifier inverting input Microphone amplifier non inverting input Negative terminal of the circuit Receiver amplifier input (gain control) Receiver amplifier output Receiver amplifier input for cut-off, see page 7. VDC supply terminal
10 11 12 13 14 15 16 17 18
12 13 14 15 16 17 18 19 20
5
PBL 3853
Functional Description Design Procedure
The first decision to make is, how much current is needed at what VDC and how much line current is available at longest line length. 1. Set the circuit impedance to the line, either active or passive. C3 should be big enough to give low impedance compared with R1 in the telephone speech frequency band. Too large C3 will make the "start up" slow. 2. Set the DC-characteristic that is required in the PTT specification, or in case of a system telephone design, in the PABX specification (R5). 3. If the line length regulation (line loss compensation) is used, set the attac point where it should start (RC and RD). Using the line length regulation makes it in most cases easier to achieve the gain/line length mask in both transmitter and receive function. Note, that in some countries the line length regulation is not allowed. 4. Set the transmitter gain and frequency response. See text for the clipping feature. 5. Set the receiver gain and frequency response. 6. Adjust the side tone balancing network. 7. Apply the RFI suppression components in case necessary. In two piece telephones the often "helically" wound cord acts as an aerial where especially the microphone input with its high gain and input impedance is the more sensitive.
Impedance to the Line
The AC-impedance to the line is set by R1 (+ R2 if active impedance is used) and C2. See figure 4. The circuits relatively high parallel impedance will influence it to some extent. At low frequencies the influence of the C3 can not be neglected. Series resistance of the C3 that is dependent on temperature and quality will cause that some of the line signal will enter pin 4 and generate a closed loop in the transmitter amplifier that will create an active impedance thus lowering the impedance to the line. The impedance at high frequencies is set by C2 that also acts as a RFI supressor. In many specifications the R1 is specified as a complex network. See figure 6 b) in the example. In case a) the error signal entering pin 4 is set by the ratio RS/R1 (909 Swedish spec.), where in case b) the ratio at high frequency will be RS/220 because the 820 resistor is bypassed by a capacitor. To help up this situation the complex network capacitor is connected directly to ground, case c) making the ratio RS/(220+820) and thus lessening the influence of the error signal. To save current the circuit can be implemented to have an active impedance to the line, the level is set by resistors R1 and R2. When an active impedance is used the transmitter (see figure 16) amplifier does not feel its own active output-impedance thus using less current to create output swing to the line. Case c) above can not be used together with active impedance. Do not use the active impedance if not necessary, it complicates things greatly. A full mathematical expression is found under Detailed Description.
DC - Characteristics
The DC - characteristic that a telephone set has to fulfill is mainly given by the network administrator. Following parameters are useful to know when the DC behaviour of the telephone is to be set: * The voltage of the feeding system * The line feeding resistance 2 x * The maximum current from the line at zero line length * The minimum current at which the telephone has to work (basic function) * The lowest and highest voltage across the telephone The DC-characteristic of the circuit is a function of the voltage on pin 4. There is also a possibility to adjust the DCcharacteristic with resistors (dc-voltage) at pin 5 (RA and RB in figure 4). Note that altering the DC-characteristic slope will also influence the line length regulation (when used) and thus the gain of both transmitter and receiver. A closer mathematical study is done under Detailed Description.
Line Length Regulation
The line length regulation is to compensate the gain in both transmitter and receiver with changing line length (impedance). The dynamic range of regulation is 6 dB. The starting point of the regulation can be set by RC and RD that take the information from the circuits supply voltage which actually mirrors the line current value in voltage. In case line length regulation is not required it can be omitted either in the high or in the low gain mode (6 dB range of regulation).
a) Real impedance b) Complex impedance c) b) a) R1 +Line C2
R1 R1 C2
+Line
PBL 3853
Circuit supply I=0.3mA
VF
PBL3853
4
Example: b) A complex network 220 + 820//115nF The complex network should be connected to the speech circuit like shown in c). See text. Rs 1 C3
Circuit supply I=0.3mA
4
VF
C3
The voltage across the circuit can be increased by method shown above without influencing the impedance towards the line.
Figure 6. AC-impedance, to the line.
Figure 7. Adjusting voltage level across the circuits.
6
PBL 3853
Connecting the pin 6 to ground disables the line length regulation in the high gain mode, whereas setting the pin 6 on 1.2 V dc level or higher disables the line length regulation in low gain mode.
Transmitter Amplifier
PBL 3853
The transmitter consists of two stages. The output of the transmitter drives a signal with adjustable impedance into the line. The signal at pin 1 (positive line) is 180 degrees out of phase with the signal at pin 2 from where the side tone compensation signal is taken. The transmitter has two inputs. An input at pin 5, where both active impedance and DC-characteristic can be adjusted. Another input at pin 3, which is the microphone signal input, where the filter for the transmitter frequency characteristic is placed. Pin 3 is at the same time used as a summing point to all other audio signals that are transmitted into the line (DTMF tones, hands free signal...). See figure 4.
11 12
M +
Dynamic mic.
Microphone Amplifier
The microphone amplifier is primarily designed to be used with dynamic or magnetic microphones but can be used with buffered elctret microphones as well. The input of the amplifier is balanced for good CMRR. The gain of the amplifier can be regulated with the line length. The microphone amplifier has a mute input of its own. Pin 10. It is possible to use the microphone amplifier as a limiter (added to the limiter in the transmitter output stage) of the transmitted signal. The positive output swing is then limited by the peak output current of the microphone amplifier. The negative swing is limited by the saturation voltage of the output amplifier. The output of the amplifier is DC-wise at internal reference level (1.2 V). The lowest negative level for the signal is reference minus one diode and sat.transistor drop. (1.2-0.6-0.1=0.5 V). The correct clipping level is found by determining the composite AC- and DCload that gives a maximum symmetrical unclipped signal at the output. This signal is then fed into the transmitter amplifier at a level that renders a symmetrical signal clipping on the line (adjust with ratio R3, R4). The total transmitter gain can then be adjusted with the load of the electret microphone buffer amplifier. See figure 9.
a)
13
PBL 3853
11 12
M +
Magnetic mic.
b)
13
PBL 3853
11 12
Receiver Amplifier
The receiver gets its input signal from the summing point where the side tone cancellation takes place. The output drives single sided a low (150 ) acoustical transducer. Diodes for absorbing acoustical shock must be provided externally. The amplifier has two inputs. One of them can be regulated with line length, the other has fixed unity gain. The latter can be used to cut off the receiver by forcing the input positive and is also useful for injecting the DTMF confidence tone into the receiver. The receiver amplifier is powered from the regulated DC-supply at pin 18.
DC (ref.1.2V) PBL 3853 Powerful cc gen C4 ref.-diod0.5V Valid when no C4 is used. DC-load=R3+R4 R3+R4>6k AC-load=R3+R4// (RDTMF+ZDTMF) //ZTI
M +
c)
13
2x50k
Extended low voltage/ current operation
4
11 12 13
PBL 3853
M +
d)
DC
PBL 3853
11 12
M +
e)
+ Line
11
R3 R DTMF ACload ZTI Z DTMF
13
R1
4
PBL3853
Circuit supply I=0.3mA
VF
7.5k 1.2V +
to gain reg. with line length ( 6dB)
DCload R4
13k
RC
6
37.5k
15k
Figure 9. Microphone amplifier output clipping, level.
R
11 12
4
PBL 3853 M +
C3 RD
45k 5 2.5k 8.77k 1.2V +
DTMF in
VX
22.6k
10k +
10 18
f)
13
PBL 3853
17
C If balanced mic.is used an additional RC link is recomm. if pin 4 is used as supply
15k
Figure 8. Fixed gain and line length regulation.
Figure 10. Common receiver and transmitter mute arrangement.
Figure 11. Microphone solutions.
7
PBL 3853
Detailed Description: Expressions for AC-characteristics
ZLine is the impedance that the telephone sees in the telephone line. Zp is the impedance formed by the passive (see fig,15.) elements in the telephone set. R1, R2 and C2 . 1/Zp = 1/R1+2f C2 (R2 can be omitted if R2 << R1)
Active impedance:
The following expression is derived from fig.12 if 1/ZLoad = 1/Zp + 1/Zline
VY R 12 1+ ZLoad - R 5 R 13
+ VS
=
VY
................................................................................................................1
Figure 12 and the expression above render the following transmitter gain expression:
Transmitter gain =
- (1+ R 12 / R 13 ) ZLoad ...........................................................2 VL VY -1(1+ R 12 / R 13 ) ZLoad = = VS VS R5 R 5 + (1+ R 12 / R 13 ) ZLoad
Figure 12 renders the following expression of the impedance across the circuit:
Impedance across the circuit =
VL 1 ...............................................................3 = 1/ ZLoad + (1+ R12 / R13 ) ZLoad / R5 ILoad
Figure 12 renders also the following expression of the impedance across R5:
Impedance across R5 =
VY 1 .............................................................................4 = 1/ R 5 + 1/ ( (1+ R 12 / R 13 ) ZLoad ) I1
R4 / /15000 10 R4 / /15000 + R3 15
From figure 13 it is possible to identify : = A1
From figure 13 it is possible to identify : From figure 13 it is possible to identify :
= 0.7
R2 / /8000 R2 / /8000 + R1
............................................................................5
= 5.8
10000 ...............................................................................................................6 1+ 15000 + R3 / /R4
These expressions together by omitting the impedance of the line ZLine from the expression, will render the impedance of thetelephone set towards the line.The telephone set impedance towards the line is:
VL = ILoad
1 ..............................................................................7 R2 / /8000 5.8 10000 1 R12 + 0.7 1+ 1+ R1 + 2fC2 R2 / /8000 + R1 R5 15000 + R3 / /R4 R13
Telephone
Telephone line
PBL 3853
2 15
Iload Zactive Zp
IL Z line VL
R7
C7
R11 +Line
R5
R10
Z bal C* * To give receiver flat frequency response
Z load
Figure 12 .
8
Figure 13.
PBL 3853
Expression for DC-characteristics. from figure16, (empirical).
VF = VL - ( ( VL - 1.3 - VDC ) 0.07 10-3 + 0.610-3 ) (R1 + R2 ) ....................................................................................8
VX =
IL =
( VF - 2.0 ) / 45 + 0.14
0.18
.......................................................................................................................................9
5.8 ( VX - 1) R12 0.65 ...........................................................................................................................10 1+ + R13 R5 R13
If the resistors RA and RB are connected in the circuit as in figure 16, the VX will have somewhat more complex expression:
VX =
( VF - 2.0 ) / 45103 + 0.14 10-3 + ( Z VL ) / ( 2.5103 RA ) ................................................................................11
0.1810-3 + 1/ 2.5103 - Z 2.5103
(
)
2
1 1 1 0.65 = + + Z RA RB 2.5103
If the resistors RA and RB are set to infinity in this expression it will take the same form as above.
NOTE 1. These expressions are built on the asumption that the of the transistors is infinite and that the influence of capacitors except C2 can be neglected. 2. These expressions are built on an ideal situation and are only for help to understand
Telephone set side Line side
Active impedance section
Telephone ILoad I1 R12 R13
Line IL
V Zp ZLine VL
+ + V R5
a
PBL 3853
Tx
2 b 15
Passive impedance section
Rx
16
Z2 R6 R8 R5 C6 Z bal R9 R10 C R7 R11
Z1
Figure 16.
MUTE and Cut-off Function
The receiver mute (pin 17) is a cut-off function. The normal receiver amplifier is cut-off but a second amplifier is activated to let the DTMF or the payphone signal injected to pin 17 get through to the earphone. The input level for cut-off: V cut-off = Rx output (VDC/2) + 2x V diode 2.2 V + 1.3 V 3.5 V The signal for DTMF confidence tone in the earphone must be injected to pin 17 at correct DC level or via a capacitor. The mute signal is taken from pin 18 via a resistor in series with at diode. The diode is needed in order not to disturb the DC-level at pin 17 in not muted condition. The transmit mute (pin 10) can be taken from the same point (pin 18) with a series resistor (see figure 10).
Figure 14.
IL
V+L R11 VTO R6 R7 R10 R5 Zbal RI Z in R19 ZLine
Figure 15.
9
PBL 3853
Side Tone Suppression
(See figure 13, 14) The side tone suppression is achieved by adding two signals V+L and VTO that are in opposite phase at input RI. Because of the complex line impedance Zline, VTO must be compensated by Zbal in order to get the correct level and phase for the signal to the summing point. Maximum compensation is achieved when following conditions are fulfilled: R5 R7 1 +1+ 1 = Z // (R1 + R2) R6 R11 line R9 R11 Rbal
T1
Diodes ensure the necessary supply to Rx for full swing.
+ 2.9V 11k 12 13 7.5k
PBL3853 + 10 6 14
18
{
}
11
+
R11>> Zline // (R1 +R2) R6 >> R5 Zbal =R8,R9,and C6 C10 is omitted in the equation Zbal = 1 R5 R11 1 R6R7 Zline // (R1 +R2) 11 R6 R7
R1 R3 TR1 + C1 DZ2 R2 DZ1 R1 R2 R3C 1DZ 1 DZ2 TR1 TR2 = 11k = 22k = 4.7k = 1000F = Ref 25Z = 2.4V = BC 178 = BC 547 pin 18 DC
Application for lower DC- supply using the microphone amplifier as a shunt regulator.
Following should be noted when designing the side tone network: The side tone network impedance in parallel with the R5 should not be too low. This does influence the transmitter gain and frequency response. (Zbal + R6 >>R5) R7 should not be low compared with Zbal this will influence the receiver frequency response. (R7>>Zbal) The side tone network impedance, parallel with the receiver input impedance Zin, should not be too high compared with Zin this influencing the spread in the receiver gain. Zin >> side tone network impedance, R11//R10// (R7+R6//Zbal). Maximum compensation without any assumption is obtained when following condition is fulfilled: R5 Zline // (R1 + R2) 1 1 1 R /R + + -56 =R R5 + R6 7 Zline // (R1 + R2 + R11) R6 R7 Zbal R5 + R6
TR2
Shunt regulator for DC- output
pin 18 To get lower voltage at DC than the 4.3V needed at pin 18 DC
{
}
In practice Zline varies with the line length and the feeding system paratmeters. Therefore Zbal should be choosen to give a satisfactory side tone suppression at an average line length. An other method is to make R11 complex. See figure 13. This will be advantageous in case the R5 is low (10-39) because this coupling will give +6dB more signal for the side tone balancing. Warning! At low values of R5 the circuit will have an insufficient overcurrent protection. A over voltage protection with lower limiting level has to be used across the circuit. It also will make it possible to implement a better working volume control for the earphone. There will be some disadvantages as: More difficult to trim and need of closer tolerance components.
R3 TR1 + C1 DZ2 DZ1 R1 R2 R3C 1DZ 1 DZ2 TR1 TR2 = = = 4.7k = 1000F = Ref 25Z = = BC 178 = BC 547
TR2
Figure 17.
Note#1 These values ensure that the frequency behaviour of the trasmitter is not influenced. With the ratio 1/10 the influence is 1 dB, and with ratio 1/20 it is 0.5 dB. Note#2 If the R6 is made low ohmic compared with Zbal, it will load the latter and result in a bad side tone performance, again if the R6 is made high ohmic compared with Zbal will result in a low signal to balance the side tone with and make the balancing difficult.
A Short Guidance for Understanding the Side Tone Principle
(See fig.14)
Assume the line impedance to be 600. Z1 = Line impedance Z2 = The telephone set impedance 600 Z1//Z2 = 300 R5 will have a certain value 39-100 to give the telephone a specified DCcharacteristic and owercurrent protection.
Assuming that this DC-characteristic requires R5=60, hence it will be 1/5 of the Z1//Z2. This will also give 1/5 of the ac-signal that is on the line across R5. Note that the signals at points a and b are 180 degrees off phase. 10 x R5 R6 + Zbal Note#1 R6 Zbal Note#2 The ac-signal at point c is now 1/10 of the signal on the line because it is further divided by two from point b. (R6 Zbal) Hence 10 x R7 R11 to satisfy the balancing criteria. R10 is to set the receiver gain. (can also be a volume control potentiometer.)
10
PBL 3853
Making any of the impedances unnecessary high will make the circuit sensitive to RFI. All values given here are approximate and serve as starting entities only. The final trimming of side tone network is a cut and try proposition because a part of the balance lies in the acoustical path between the microphone and earphone. Note: That the DC-supply charge current coming from the line, given by the expression VD/R13, because of the constant voltage difference of VD between the pins 1 and 9, makes it possible to use the DCsupply for external electronics at low line currents even before the speech function. It can be seen in the figure 16 that the line voltage at low line currents is given by VL = V18 + 2 VD + I1xR12 6.0V. (V18 = 4.5V;I1 small) The DC-supply level is monitored by a circuit that will cut the charge current whenever the line voltage with the modulated signal reaches a value 2 x Example: A payphone is to be designed. According to the specification the minimum line current is 20mA at 6V inclusive the bridge for the phone to work with all its auxiliary functions. The auxiliary functions will need as much current as it is possible to draw from the line and the worst case is naturally at the longest line length. The speech section of the circuit with the earphone amplifier needs 4mA for function. In this case the highest possible IDC with the longest line will be 20 - 4 = 16mA. diode drops below the DC level. The current will be returned via TR2 to ground thus maintaining the correct impedance towards the line and making it possible to transmit a swing to the line that has lower level than the DC. See figure 18. When the line voltage without signal reaches the TR2 monitor level the charge to the DC-supply will be cut off whereby the receiver dies because it draws its current from the DC-supply. In case that the dc-characteristic is set such that the current will come first to the minimum working level (IDC + 4 mA) then the transmitter will die first because of the IDC priority.
DC-Supply
In general The most significant feature of this speech circuit is its ability to draw current from the line, that is used to a DC-supply for auxiliary electronics and for the receiver amplifier on the chip, under maintaining the line impedance. This function is boosted by two external high PNP transistors T1 and T2, and internal amplifier and a comparator. In detail The circuit is designed such that it supplies current first into the DC supply output (priority) so that the microcomputer which is controlling the auxiliary circuits and functions will have power. The rest of the line current is going to the speech function supply at pin 4 (0.3mA) and through the transmitter. The speech function needs 4mA min. to operate to full specification. The current to the DC supply is set by expression: IDC = (I1 x R12 + VD)/R13 where VD = 0.65V, I1 4 - 0.3 = 3.7mA and controlled with an amplifier through the voltage between terminals 1 and 9. A certain increase in the voltage (VL) across the resistor R12 will result in an equal increase in the voltage across R13 which gives the expression: IL=I1 (1 + R12/R13). From this can be seen that an increasing line current will also partly increase the DC-supply current. The comparator will compare the voltage at terminal 18 plus 2xVD ( 1.3V), with the voltage at terminal 1, whether it is higher or lower. The line current will be distributed as follows: The comparator will route the line current to the DC-supply until the set current is reached after which the exceeding line current will be divided between the transmitter and the DC-supply according to the expression IL = I1 (1 + R12/R13).
IL= I1 +Ipin4 +IDC , see figure 16 or I1= IL - Ipin4 - IDC
or IDC= IL and
- Ipin4 - I1
I1 R12 + VD= IDC R13 Values for R12 and R13:
(I1 R12 ) + VD = IDC
R13
The speech function current consists of two branches I1 and the current to pin 4 which is 0.3mA thus the current I1 through R12 will be 4 - 0.3 = 3.7mA. VD is taken to be 0.650V. Choose R12 = 50 to start with. The voltage drop across this resistor is translated to voltage drop across R13 which in its turn will steal available voltage from VDC. These values render a R13 = 51.6 . An increasing available line current will be divided between I1 and IDC as follows: I1 R12= IDC R13 IL = I1 + IDC I1 = IL /( 1 + R12/R13 ) or LDC = IL /( 1 + R13/R12 ) IL= I1(1+R12/R13)=IDC(1+R13/R12)
Simply, when the voltage drop across R13 reaches one diode drop (0.650V) then the current will be divided between I1 and IDC as 1:(R13/R12) = 1:(51.6/50) 1:1.
11
PBL 3853
Comments to the Reference Figure for PBL 3853 Test Set up (fig.4) Regarding the External DC-Supply (VDC).
This schematic is a specific application of the PBL 3853, where the main objective is to optimize the usage of the line current so that of 16 mA line current 12 mA can be taken out to feed auxiliary functions. Typical line voltage 6.0 V at 20 mA line current (with a transmitter signal swing of 1.8 Vpeak). It would be possible to save some more current ( 50mA) by instead of increasing the DC-characteristic towards the line with low ohmic Rc and Rd (the sum 41k) make these larger (68k+33k=101k) and lift the DC-char. with Rb instead (see fig.7). The gain of this is questionable because the need of an additional resistor. It ought to be understood that these 12 mA charge current into VDC out of 16 mA line current can only be acchieved in no signal condition, both transmitter and receiver. In case there is a transmitted signal above a certain (low) amplitude, it will cause breaks in the 12 mA VDC charge current during a part or the whole time of the negative half periodes of the signal on the line. This means that the filtered VDC will have a lower usable current output. Is the said signal on the line large, it will cause an absense of the charge current half of the time and the useful current will sink to 6 mA. (See fig. 15). A similar thing will happen at receiving as at transmitting but on top of that, the current to the receiver which is taken from VDC will leave even less current available from VDC. The speech functions and with them the VDC output will die below 16 mA line current. There is an unintentional effect that might cause puzzlement. Just below 16 mA line current the VDC will come into function and will be operating when a high signal is on the line. With a high signal on the line half of the set current, in this case 6 mA, can be taken out. The possible available current out from VDC will increase with increasing line current and the margin to, that a signal on the line has the effect of decreasing the available current out from VDC, will increase in the same extent as the line voltage increases. Figure 4 shows only one of the many ways to use the circuit to generate the VDC supply. The conditions for dimensioning the VDC are set by the available line voltage and line current, what voltage respectively current the VDC supply has to deliver or actually the difference between the line voltage and VDC out respectively line current contra the possible output current from VDC. It is possible to minimize these differencies somewhat but it requires more complex solutions, on the other hand if the requirement to keep the voltage and current difference as small as possible is not of utmost importance it is possible to create simpler solutions than what is shown in the figure 4. In case there is a need to minimize the voltage difference between line and VDC it can be influenced as follows. To start with, the level that sets which way the current will go, either through T1 to VDC or through T2 to ground, has to be altered. It is done easiest by adding a shunt regulator between the collector of T1 and pin 18 on the circuit. The VDC is still taken at the collector of T1, see fig. 20. In the most simple case the shunt regulator can be a diode (eventually a Shottky diode) maybe with an addition of a resistor between pin 18 and -line to keep somewhat constant voltage across the diode. Unfortunable the voltage can not be increased more than a couple of hundred millivolts before the function that is to provent the T1 from saturating regarding the voltage across it would disappear and which in is turn would result that the negative half periodes of the signal would be clipped with a massive distortion as a result. What has to be done at the same time to come further in this matter is to make the voltage drop smaller across R13 (also to use a T1 with low sat.voltage). This requires that the sense level of which voltage has to be across R13 is altered. The voltage across R13 is one diode drop plus the voltage drop across R12. What can be done is to substract some of the diode drop, see fig. 21. Observe that the circuitry needs a recalculation of several components especially R13. How far it is possible to come, by decreasing the gap between Vline and VDC depends on spread figures and temperature requirement. The difference between the line current and current out from VDC is possible to alter but only to minor extent.
I1
Line with signal
IL R13 IDC
VL
R12
1
to gain reg. with line length
TR2 control level DC- supply 4.5V TR1
4
PBL3853
VF 7.5k
9 +
Circuit supply I=0.3mA
VD 1.2V + 37.5k 13k 15k 2xVD
7
T2
R1
Vx
+8 +
T1
6
TR1 conducting. DC- supply charged constantly.
C1
45k 5 2.5k 8.77k
22.6k
10k + 16 36k 18 +
VDC
Mic.
12 13
1.2V +
A1
10 11
Line with signal TR2 control level DC- supply 4.5V TR1
R2 C4 R3 + C3 RB R4
15k 7.5k + 1.2V
3 14
2
17
15
VF RA
4.5V C5 R5
C2
TR2 conducts. DC- supply charge interrupted during these periodes.
Figure 18.
12
Figure 19 . Functional Diagram.
Z - Line
PBL 3853
What can be done, is to use more of the transmitter ouput signal for charging the VDC via the T1,. The transmitter output signal passes both R12 and R13. The transmit current that passes R12 is lost regarding the charging of VDC but it can not be zero because it is exactly that signal that via the amplifiers and followers T1 and T2 drives the current through R12. Caution has to be taken so that spread figures do not eat up all the won current. If the specification of DC-characteristic towards the line has to be maintained when the quota of R12/R13 is made smaller, the R5 must most probably be increased. What has to be understood is that the current consumption of the IC circuit it self (like in the given figure. 4.) can not be lowered and that it at 16 mA line current not only consists of approx. 540 mA into pin 4, but also that of the 3.2 mA into pin 1, some 600 mA is used to power up the IC. This supply current to the circuit will be multiplied by the R13/R12 ratio but it will not participate in giving any signal out. What is left of the current that also passes pin 2, to produce output signal, is 2.6 mA. Of this current 1.9 mAp is modulated. This current in its turn will be multiplied by R12 and R13 (the function being 1+R12/ R13) and the result 4.2 mAp will give in the load of 490 (600 //2.7 k) a signal swing of approx. 2 Vp. This value will fulfil a typical requirement of 1.4 Vp swing with margin. Even in a case, that the differencies in the in- and out-current respective voltage are satisfactory, there might be a need for redimensioning. In case that a lower DC mask is desirable and there is a possibility to accept a lower VDC it can be made with RA for the DC mask (RC and RD must be high ohmic) and sinking the voltage for the shunt regulator VDC (simply drawn as a diode in the fig. 4). What has to be observed is that the supply for the receiver amplifier is also lowered this way and hence the output swing of it. In contrary if a higher DC mask is desired and a higher line voltage is acceptable, both can thus be increased (the line voltage is increased with RB). A higher current out of VDC can be acchieved by altering R12, R13 and R5 but at cost of the lowest line current the circuit will work with, which will increase accordingly. The opposite is valid if less current is required out of VDC it will say that the circuit will work to lower line current. The lowest line current the circuit will work to full specification is (with the increased DC mask) 5.5 mA but in this case only 1 mA can be taken out of VDC (with no current out of receiver output). The circuitry can be made simpler in case the requirement for the voltage and/or current difference between the line - and VDC is smaller. If the requirement for the smallest possible voltage between the line voltage and the voltage at VDC gets easier, which will say that the difference is that large (1-3 V dependent on spec.) so that the AC signal on the line never goes that much negative that it reaches the VDC level, the transistor T2, which is used to shunt current past the VDC in order not to disturbe the line impedance, can be omitted and the pins 7 and 8 connected together. To ensure that high enough signal can be taken out from the receiver when a low VDC is used a shunt element should be connected between VDC and pin 18 (see fig. 20). If the requirement on the difference between the line current and the current out from VDC is not that critical, it means that the circuit can dispose more current for its own function. The first thing in this case is to see if the active transmitter output impedance towards the line is necessary. (in case it is used in the first place). The active impedance towards the line is used to save current and it functions as follows. The transmitter generates at the same time as it transmits a required impedance towards the line by taking a part of the signal on the line and feeding it back to the transmitter amplifier, thus saving the current that would have been necessary to drive the signal out on the line. Because the transmitter amplifier is not current loaded by the impedance that it generates itself, the current need with active impedance will be: 600 line impedance parallel with the 2.7 k (R1) which with transmit swing of 2 Vp needs 4.1 mAp transmitter current instead if the circuit would have a passive impedance of 600 the current needed would be 6.7 mAp. The current need without active impedance increases with 2.6 mAp. Half of this current flows through R12 and generates no charge current for VDC, hence if the difference between the line current and VDC current increases by 1.3 mA it would result that the active impedance could be changed against a passive. This is done by omitting C1, short R2, decrease R1 to a suitable value for the impedance towards line (R1 can be a complex network) and adjust back the DC mask to compensate for the lower voltage drop across R1. The pin 5 can be left open or connected with a small
R13 R12
+Line
PBL 3853
5 4 10 +V
1
9
7
T2 T1 VDC
Shunt regulator
8
-
18
8
T1 VDC
Shunt regulator
12
M
13
()
C10
D1
Rx
Tx
16
C10 D1 -Line
6
14
11
3
2
17
15
18
()
Figure 21.
Maybe a current generator
-Line
Figure 20.
13
PBL 3853
capacitor to ground if the input tends to pick up noise. This input can also be used as a second input to the transmitter (in-impedance approx. 8 k, gain depending on the arrangement at pin 3) used for ex. DTMF tones. If there is with passive impedance still extra margin in current (more that 4 mA + 1.3 mA = 5.3 mA) then it is possible to increase the current through R12 versus current through R13 by making the R12 go towards 0. The whole transmitting current would go through pin 1 to the line and the charge current for VDC would be set by a diode voltage drop across R13 which would make the current that can be taken out from VDC constant, regardless the line current. (assuming that the line current is high enough) The lowest current for such a circuit is, if no more current is taken out of the VDC than what is needed for the earphone amplifier: 540 mA into pin 4 plus 600 mA supply current into pin 1 plus 6.7 mA transmitting current to give 2 Vp signal across 300 load (600 line parallel with 600 output impedance of the circuitry) plus 0.8 mA to VDC and pin 18 in order to get 0.6 Vp across 350 earphone (according to the test circuit) the sum is 8.6 mA line current, or for 0.4 Vp across 150 earphone the sum being 8.8 mA line current. The rest of the available line current can be utilized, by decreasing R13, to charge VDC. In this manner simplified circuit should be adapted to the requirement for the VDC, both in voltage and current, related to under which line conditions the circuit has to work. The circuit gets more complex the closer the operational limits are utilized. The drawback in using the active impedance towards the line, is the difficulty of dimensioning (especially in case of complex line impedance requirement) that limits its usage to only when absolutely necessary. so called "softclipping" is a methode where the line voltage is monitored and the transmitter gain is controlled in case the line voltage gets to high. This can be adapted to PBL 3853 as follows. The line length regulation function is used to control the gain down when high signals appear on the line, no matter if line length regulation is desired or not. In the case the function is used there is the high gain situation at a long line (where it is actual to regulate the gain down) but in case the function is not used the transmitter is set to have the high gain by making the RD enough low ohmic and omitting RC. The 1k resistor is to prevent an unlinear load to the line and also to form the "on" time constant of the function with the capacitor CB. A capacitor of 0.1 F will block the DC from the line but will also set the lower frequency characteristic for the function. The two diodes form a voltage doubler rectifier for the AC signal which is then filtered by CB, the resistor of 10M will set the "off" time constant. The transistor acts as a impedance transformer. Resistor RE sets the level at which the amplitude limiter cuts in. It is possible to connect diodes in series with the pin 6 (pointing to the pin) in order to alter the "edge" of the limiter. The value of RE is set by the values of RC and RD. A component value suggestion for the case of no gain regulation with line length: RC = RD = 8.2k RE = 4.7k.
Softclipping
(see Fig.22) The risk for signal clipping increases on long lines especially when using the line length regulation that doubles the gain on such a line. This clipping is highly uncomfortable for the second party but also for one self because it destroys the side tone balance and thus allows shockwise 20 dB higher levels into the receiver of ones own voice. There is a cure for this especially if an active impedance is used towards the line. A
18 CA 0.1F RC 1k CB 22n 10 M RE 6 RD 14 -line "Softclipping" for PBL 3853, rest as in Fig 4. 4
+line
Figure 22.
+5V +12V R1 IC 5a 3 4 D4 D3 R2 C1
+ Line R12
R13
9 + +8 + 18 7
+
PBL 3853
5
AC-DC char.adjust
1
IC 1
IC2 IL300 T2 T1 6 D1 C10 1 2 3
IC4 LM358 83 + 1/2 -2 4 C13
C15 68nF TX
10
Tx mute
R28 464
1
6
5
4 12
+V
100pF
Line in
D2 D1-D4 schottky 5
D1
16 13 6 14 11 3 2 17 15
5
4
R23 330k
R30 33k GND -12V
6
C5 4 IC 5b 3 -Line Current direction information C3 Rc R3 R4 R5 RD
R6 R8
R7
C7
C8 3 C2 4 2 1
C6 R9
R11 R10
IC3 IL300 6
R29 150k C21 100pF 61/2 + 5 R24 33k 7 C14 68nF RX
5
Figure 23. Analog line interface to a digital PABX with galvanic insolation by linear optocouplers (IL3000) using PBL 3853.
14
PBL 3853
15
PBL 3853
Ordering Information
Package Part No
Plastic DIP Plastic Plastic
PBL 3853N PBL 3853SO PBL 3853SO-T
Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Ericsson Components AB. These products are sold only according to Ericsson Components AB' general conditions of sale, unless otherwise confirmed in writing.
Specifications subject to change without notice. IC4 (96001) A-Ue (c) Ericsson Components AB 1996
Ericsson Components AB S-164 81 Kista-Stockholm, Sweden Telephone: (08) 757 50 00 16

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